Wireless MAC Design Engineer
Apple
Summary
Description
Minimum Qualifications
- BS and 10+ years of relevant industry experience
Key Qualifications
Preferred Qualifications
- Very strong digital logic design fundamentals
- Expertise in translating functional requirements into synthesizable Verilog or SystemVerilog RTL
- Knowledge of digital design flows such as RTL simulation and debug, synthesis, lint, STA and LEC
- Ability to design multi-clock-domain logic and resolve CDC problems
- 4+ years of experience in ASIC microarchitecture and RTL design
- Understanding of wireless standards, such as IEEE 802.11, 802.15, Bluetooth or 3GPP is a plus
- Understanding of ASIC low power design techniques, e.g. multiple supply domains configuration and management, dynamic power/clock scaling and power analysis is a plus
- Familiarity with power estimation (vector-less and vector-based), modeling, profiling, and post silicon power correlation
- Understanding of ASIC test methodologies, including DFT, scan insertion, memory BIST, and others is a plus
- Excellent organizational skills
- Excellent communications skills – both written and oral.
Education & Experience
Additional Requirements
Pay & Benefits
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